FIG. 1 shows a schematic diagram of a switched-mode power supply 1 able to output an electrical voltage signal V0. The power supply 1 has a controller 10 comprising a first input for receiving the voltage V0 and a second input for receiving a reference voltage Vc, and an output for outputting a control signal Sc. The controller 10 itself comprises an analog-to-digital converter 12, followed by a regulator 14 implementing a control law and a waveform generator 16. The power supply 1 further comprises a voltage generator 20 able to produce the electrical voltage signal V0 as a function of the control signal Sc. The voltage generator 20 conventionally comprises a set of switches controlled by the signal produced by the waveform generator 16, and an inductor-capacitor filter or LC filter.
During operation, the voltage V0 produced by the voltage generator 20 is compared to the reference voltage Vc by the analog-to-digital converter 12, which quantifies in a digital word W the difference between the voltage V0 and the reference voltage Vc. The regulator 14 determines, based on the digital word W and the control law, a command signal Scom to correct the voltage V0 such that the latter tends towards the reference voltage Vc. The command signal Scom is then received by the waveform generator 16 which modifies the control signal Sc accordingly. The control signal acts in turn on the waveform output from the voltage generator 20 and therefore ultimately on the voltage V0. Typically, the command signal Scom is a number characterizing a duty ratio controlling a waveform generator 16 of the digital pulse-width modulator type.
In practice, the precision of the slaving of the voltage V0 to the reference voltage Vc is sensitive to the resolution at which the analog-to-digital converter 12 and especially the waveform generator 16 are likely to work, which typically can reach 11 bits at a frequency of 10 MHz. For technological and economic reasons, the use of a waveform generator 16 working at such high resolutions is not always practical.
In response to this problem, the sequence of digital words M produced by the analog-to-digital converter 12 can be requantized, by decreasing the resolution while limiting the number of bits used for each digital word W. Various algorithms allow performing this quantization efficiently, particularly the process known as dithering for which the implementation is described in the document entitled “Digital Pulse-Width Modulation Control in Power Electronic Circuits: Theory and Applications”—Angel Vladimirov Peterchev, Seth R. Sanders—Electrical Engineering and Computer Sciences—University of California at Berkeley—Technical Report No. UCB/EECS-2006-22—http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-22.html—Mar. 13, 2006.
Such a process is based on the principle of distributing quantization error corrections over a predetermined period of time, by periodically adding least significant bits to the signal so that the average of the signal approximates the average value over said period of the signal before quantization. The LC filter of the switched-mode power supply 1 then averages the quantization error corrections over time. In addition, the longer the period of time considered, the more noticeable the improvement in the resolution of the quantization operation.
The downside to this improvement is that the periodic production of error corrections is likely to introduce variations, called ripple, in the quantified signal. This ripple is sufficiently low in frequency that the LC filter of the switched-mode power supply 1 is not able to apply effective averaging.
In addition, the ripples produced by the dithering processes of the prior art are likely to combine with other faults in the switched-mode power supply 1, particularly the ripple introduced by control faults of the set of power switches. Ultimately, such dither ripple is detrimental to the overall precision of the signal that is output by the switched-mode power supply 1.